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Digital Rhyme
FPGA board, oscilloscope waveforms, and digital logic notes on a lab bench

counter.v Source

Modules, wires, regs, combinational logic, sequential logic, testbenches, and synthesis.

1// SPDX-License-Identifier: MIT
2// A parameterized synchronous counter with active-high reset.
3module counter #(
4 parameter WIDTH = 8
5) (
6 input wire clk,
7 input wire rst,
8 input wire en,
9 output reg [WIDTH-1:0] count
10);
11 always @(posedge clk) begin
12 if (rst)
13 count <= {WIDTH{1'b0}};
14 else if (en)
15 count <= count + 1'b1;
16 end
17endmodule